Semiconductors and Electronic Devices MCQ Questions & Answers in Modern Physics | Physics

As it is forward biased so it takes positive value. Hence, option (D) is correct.

For our convenience, the output of first NAND gate is chosen as $$X$$ as shown

Output of first NAND gate, $$X = \overline {A \cdot B} $$
Using De-Morgan's theorem $$\overline {A \cdot B} = \overline A + \overline B $$
So, $$X = \overline A + \overline B $$
Now, output of 2^nd NAND gate,
$$Y = \overline X = \overline {\overline A + \overline B } $$
Again $$\overline {\overline A + \overline B } = \overline{\overline A} \cdot \overline{\overline B} = A \cdot B\,\,\left( {\because \overline{\overline A} = A} \right)$$
Hence, $$Y = A \cdot B$$
This is the logic function of AND gate.

$$\eqalign{ & {\text{Given }}\Delta {V_i} = 10 \times {10^{ - 3}}V \cr & \Delta {I_c} = 3 \times {10^{ - 3}}\;A \cr & \Delta {I_b} = 15 \times {10^{ - 6}}\;A \cr & {R_i} = \frac{{\Delta {V_i}}}{{\Delta {I_b}}} = \frac{{10 \times {{10}^{ - 3}}}}{{15 \times {{10}^{ - 6}}}} = 0.67k\Omega \cr & \therefore {\text{Voltage gain}} = \frac{{\Delta {I_c}}}{{\Delta {I_b}}} \times \frac{{{R_0}}}{{{R_i}}} \cr & = \left( {\frac{{3 \times {{10}^{ - 3}}}}{{15 \times {{10}^{ - 6}}}}} \right) \times \frac{{1000}}{{670}} = 200 \times \frac{{1000}}{{670}} \approx 300 \cr} $$

The energy band gap is maximum in insulators.

Output of upper AND gate $$ = \bar AB$$
Output of lower AND gate $$ = A\bar B$$
∴ Output of OR gate, $$Y = A\bar B + B\bar A$$
This is boolean expression for XOR gate.

The $$n$$-type semi-conductor can be produced by doping an impurity atom of valency 5 i.e. pentavalent atoms (phosphorus). Holes are minority carriers in them.

$$\eqalign{ & {g_m} = \frac{{\Delta {I_p}}}{{\Delta {V_g}}} \cr & {\text{or}}\,\,\Delta {I_p} = {g_m} \times \Delta {V_g} = 3 \times {10^{ - 4}} \times \left[ { - 3 - \left( { - 1} \right)} \right] \cr & = - 6.6 \times {10^{ - 3}}A \cr & = {\text{shortage of }}0.6 \times {10^{ - 3}}A \cr} $$

$$\rho = \frac{1}{\sigma } = \frac{1}{{{n_e}e{\mu _e}}}$$
\[\left[ {\begin{array}{*{20}{l}} {\sigma = e\left( {{n_e}{\mu _e} + {n_h}{\mu _h}} \right)}\\ {{\rm{ Here}}\,{n_h}{\mu _h}\,{\rm{is}}\,{\rm{neglected }}} \end{array}} \right]\]
$$\eqalign{ & = \frac{1}{{{{10}^{19}} \times 1.6 \times {{10}^{ - 19}} \times 1.6}} \cr & {\text{or}}\,\rho = 0.4\,\Omega m \cr} $$

$$\left( {\overline {A + B} } \right) = {\text{NOR}}\,{\text{gate}}$$
When both inputs of NAND gate are connected, it behaves as NOT gate OR + NOT = NOR.

A crystal structure is composed of a unit cell, a set of atoms arranged in a particular way; which is periodically repeated in three dimensions on a lattice. The spacing between unit cells in various directions is called its lattice parameters or constants. Increasing these lattice constants will increase or widen the band-gap $$\left( {{E_g}} \right),$$  which means more energy would be required by electrons to reach the conduction band from the valence band. Automatically $${E_c}$$  and $${E_v}$$  decreases.